Embeded Combinatory Firmware

Embedded real-time firmware for optical sorting machines — Project Overview

What It Is

Embedded C firmware for an ARM-based FPGA SoC running a real-time OS. Combines detections from 4 industrial cameras on an optical sorting line. Detections arrive via serial queues, are combined across cameras in a circular buffer, evaluated through configurable boolean rules, and converted into actuator firing commands.

Also includes: a C# rule compiler library and C# host integration clients for diagnostics and logging.

Architecture

graph TD
    subgraph CAM["4 Industrial Cameras"]
        C1["Camera 1"] --> Q1["Detection\nQueue"]
        C2["Camera 2"] --> Q1
        C3["Camera 3"] --> Q1
        C4["Camera 4"] --> Q2["Local\nQueue"]
    end

    subgraph FW["Embedded Firmware"]
        ORCH["Orchestrator"] --> PIPE["Combinatory\nPipeline"]
        PIPE --> EVAL["Rule\nEvaluation"]
        EVAL -->|accept| OUT["Output\nQueue"]
        EVAL -->|reject| X["Discard"]
    end

    subgraph HOST["Host Software"]
        RULES["Rule\nCompiler"]
        DIAG["Diagnostics\n& Logging"]
    end

    Q1 --> ORCH
    Q2 --> ORCH
    OUT --> HW["Actuators"]
    RULES -->|"upload"| EVAL
    FW -.->|"telemetry"| DIAG
  

Our Code — Line Count

Development Time Estimate

How long would a super senior embedded C + C# developer take to build this from scratch, writing all code by hand?

Why Estimates Must Account for Hidden Costs

Phase Breakdown (Realistic Estimate)

Scenario Comparison

Actual Development Timeline (with AI Coding Assistant)

The project was built with an AI coding assistant writing ~90% of the code, directed by a senior developer who designed the architecture and made all decisions. Human role: architecture, decisions, prompting, review, hardware testing.

Reconstructed from Git + Memory Bank

Estimate vs Reality

Key Observations

1. Architecture & debugging = only 2–2.5x speedup. These require human reasoning that AI can assist but not replace. Understanding race conditions and hardware-specific bugs requires domain expertise and physical access to equipment.
2. Code generation phases = 3–8x speedup. AI excels at generating tested, pattern-consistent code. The rule compiler, dual evaluation engines, and 530 tests were produced at speeds impossible by hand.
3. Rework cost drops from days to minutes. The 1,277 deleted lines cost ~5 human-days to write. With AI, writing & deleting 500 lines is a 15-minute operation. This fundamentally changes how you approach exploratory design.
4. Second evaluation engine complete in 2h16m. Plan + implementation + 18 tests for a complete module. This would take a human 5 full days. The clearest example of AI-augmented development being qualitatively different, not just faster.
5. Implied productivity: 1,637 LOC/day with AI vs 370 LOC/day by hand. For embedded C with full test coverage. Industry average for safety-critical embedded: 50–150 LOC/day.